1. Field of the Invention
The present invention relates to a semiconductor light emitting device and a fabrication method for the semiconductor light emitting device. In particular, the present invention relates a semiconductor light emitting device and a fabrication method for the semiconductor light emitting device for improving outward luminous efficiency.
2. Description of the Related Art
The semiconductor light emitting device which composes a III group nitride based semiconductor is used for an LED (Light Emitting Diode) etc. As an example of the III group nitride based semiconductor, there are aluminum nitride (AlN), gallium nitride (GaN), indium nitride (InN), etc. A typical III group nitride based semiconductor is expressed with AlxInyGa1-x-yN (where 0<=x<=1, 0<=y<=1, 0<=x+y<=1).
The semiconductor light emitting device using the III group nitride based semiconductor has a structure layered by n-type III group nitride based semiconductor layer (n-type semiconductor layer), active layer (luminous layer), and p-type III group nitride based semiconductor layer (p-type semiconductor layer) on the substrate at this order, for example. And the light which a hole supplied from the p-type semiconductor layer and an electron supplied from the n-type semiconductor layer recombine and generate in the active layer is outputted external (for example, refer to Patent Documents 1).
As the active layer, a MQW (Multiple Quantum Well) structure which sandwiched a plurality of layer by a well layer in the shape of sandwiches by the barrier layer with a greater band gap than the well layer is adoptable (for example, refer to Patent Documents 2).
In an MOVPE (Metal Organic Vapor Phase Epitaxy) method, the dislocation density of GaN obtained by using AlN or a GaN low temperature buffer layer on a sapphire substrate is about 108 to 1010 cm−2. On creating devices, such as a semiconductor laser, not more than about 106 cm−2 are needed. The dislocation, which is a problem, is penetration dislocation inherited with crystal growth from an interfacial region with the sapphire substrate.
Currently, a technology established as an effective method of reducing dislocation density to about 106 to 107 cm−2 is an ELO (Epitaxial Lateral Overgrowth) technology which employed the characteristics of selective ELO efficiently.
There are the ELO technologies based on an HVPE (Hydride Vapor Phase Epitaxy) method and an MOVPE method for the ELO technology applied to GaN. It is the characteristic that the HVPE method can take a large growth rate in several 10 to several 100 micrometer/h.
The method of being based on the HVPE method is called FIELO (Facet-Initiated Epitaxial Lateral Overgrowth). In the FIELO, the thing formed the stripe shape mask pattern of SiO2 with lithography is used as a substrate, for example on GaN with a thickness of 1 to 1.5 micrometers grown up with the MOVPE method on the sapphire (0001) surface (c surface). That is, in the semiconductor light emitting device, first of all, an about several micrometers n-type GaN layer is grown epitaxially on a sapphire substrate, then, an SiO2 film or a SiNx film is formed partially on an n-type GaN layer, and then, the n-type semiconductor layer is formed for n-type GaN layers except the SiO2 or the SiNx film with selective ELO as a seed crystal of the selective ELO (for example, refer to Non-Patent Document 1).
However, if the n-type GaN layer having a refractive index which is greatly different from the value of a refractive index of the sapphire substrate to the down side of the SiO2 film or the SiNx film having a refractive index near the value of the refractive index of the sapphire substrate is located, a reflection of light occurs by the interface between the sapphire substrate and the n-type GaN layer, and light of the semiconductor light emitting device cannot be extracted external effectively, thereby the outward luminous efficiency reduces.
In the structure, when fabricating a nitride based semiconductor by an MOCVD (Metal Organic Chemical Vapor Deposition), for example, by using a sapphire substrate as a substrate for growth, metal organic compound gas was supplied as reactant gas, and the GaN epitaxial growth layer was formed on the sapphire substrate for crystal growth temperature at high temperature about 900 degrees C. to 1100 degrees C. The surface morphology of the GaN semiconductor layer by which direct growth is performed on the sapphire substrate by using the MOCVD method is very wrong. Then, before growing up the GaN semiconductor layer, a method of forming a buffer layer of AlN on the sapphire substrate is used. However, the growing condition of the buffer layer is limited severely, and also the described method needs to control film thickness strictly to 100 to 500 Å (angstrom) at the very thin range. Moreover, when performing crystal growth of the GaN layer on the AlN buffer layer, lattice constant mismatching is remarkable.
Moreover, when forming the p-type semiconductor layer in multilayer structure, in order to reduce the heat damage to an active layer, it is necessary to perform low-temperature growth, and it is necessary to reduce forward voltage (Vf) and to improve luminous efficiency simultaneously. Moreover, when applying the GaN layer as the p-type semiconductor layer, there is a problem in respect of a transparency over a luminous wavelength.
Moreover, as for the number of pairs of MQW, 4 to 5 pairs are used in the structure. In this case, an electron supplied from the n-type semiconductor layer jumps over the active layer, and flows to the p-type semiconductor layer. On this occasion, before a hole supplied from the p-type semiconductor layer reaches the active layer, the hole recombines with the electron, and the hole concentration which reaches the active layer decreases. Thereby, the luminance of LED will decrease. In order to prevent this phenomenon, a structure, which inserts the p-type AlGaN layer with a large band gap in front of the p-type semiconductor layer, is used. However, if aluminum (Al) is introduced, performing the p-type becomes difficult, and a value of resistance rises. On the other hand, when applying an InGaN layer to the well layer of the active layer, there is a problem that it is weak to the heat damage accompanying the high temperature process in formation of the p-type semiconductor layer.    Patent Document 1: Japanese Patent Application Laying-Open Publication No. H10-284802    Patent Document 2: Japanese Patent Application Laying-Open Publication No. 2004-55719    Non-Patent Document 1: SAKAI Akira, and USUI Akira, “REDUCTION OF DISLOCATION DENSITY BY GaN SELECTION EPITAXIAL LATERAL OVERGROWTH”, Monthly Publication of the Japan Society of Applied Physics, Vol. 68, No. 7, pp. 774-779 (1999)